1. Field of the Invention
The present invention relates to a solid-state image-sensing device in which variations in sensitivity among individual pixels are corrected.
2. Description of the Prior Art
Conventionally, a solid-state image-sensing device (hereinafter referred to as an “area sensor”) having photosensitive elements such as photodiodes outputs, for each pixel, an image signal obtained from that pixel during an image sensing operation and a noise signal representing the variation in sensitivity of that pixel by way of an output signal line so that the variation in sensitivity of each pixel can be corrected by subtracting the noise signal from the image signal for that pixel. An example of such an area sensor is shown in FIG. 22.
The area sensor shown in FIG. 22 has pixels G11 to Gmn each having a photosensitive element such as a photodiode, signal lines 1-1 to 1-m connected, one for each column of the pixels G11 to Gmn, to the output-side ends of the pixels G11 to Gmn, and constant-current sources 2-1 to 2-m connected individually to the signal lines 1-1 to 1-m. That is, the output of the pixel Gab (wherein “a” represents a natural number fulfilling 1≦a≦m and “b” represents a natural number fulfilling 1≦b≦m) is output by way of the signal line 1-a and is amplified by the constant-current source 2-a connected to that signal line 1-a.
To the signal lines 1-1 to 1-m, switches S1-1 to S1-m and switches S2-1 to S2-m are connected individually. Through the switches S1-1 to S1-m, the image signals from the signal lines 1-1 to 1-m are fed to capacitors C1-1 to C1-m, respectively. On the other hand, through the switches S2-1 to S2-m, the noise signals from the signal lines 1-1 to 1-m are fed to capacitors C2-1 to C2-m, respectively. The image signals fed to the capacitors C1-1 to C1-m so as to be “sampled and held” therein are fed through buffers 20-1 to 20-m to the non-inverting input terminal of a differential amplifier 22. On the other hand, the noise signals fed to the capacitors C2-1 to C2-m so as to be “sampled and held” therein are fed through buffers 21-1 to 21-m to the inverting input terminal of the differential amplifier 22.
The buffers 20-1 to 20-m and 21-1 to 21-m are each composed of MOS transistors as shown in FIG. 23. Specifically, the buffer 20 (corresponding to the buffers 20-1 to 20-m and 21-1 to 21-m shown in FIG. 22) is composed of an N-channel MOS transistor Q1 having its gate connected to the node between the switch S (corresponding to the switches S1-1 to S1-m and S2-1 to S2-m shown in FIG. 22) and the capacitor C (corresponding to the capacitors C1-1 to C1-m and C2-1 to C2-m shown in FIG. 22), an N-channel MOS transistor Q2 having its drain connected to the source of the MOS transistor Q1, and an N-channel MOS transistor Q3 having its drain connected to the source of the MOS transistor Q2.
The MOS transistor Q1 receives at its drain a direct-current voltage VDD. The MOS transistor Q2 receives at its gate a pulse signal φP, and thus functions as a switch. The MOS transistor Q3 receives at its gate a direct-current voltage and at its source a direct-current voltage VSS, and thus functions as a constant-current source. The output of the buffer 20 is extracted from the node between the source of the MOS transistor Q2 and the drain of the MOS transistor Q3.
In this conventional area sensor, the switches S1-1 to S1-m and S2-1 to S2-m, the capacitors C1-1 to C1-m and C2-1 to C2-m, the buffers 20-1 to 20-m and 21-1 to 21-m, and the differential amplifier 22, which together constitute an output circuit for handling the signals from the individual columns, operate as shown in a timing chart in FIG. 24.
First, when the pixels G1k to Gmk (where “k” represents a natural number fulfilling 1≦k≦n), which feed their outputs to the signal lines 1-1 to 1-m, output image signals, then, as shown in FIG. 24, the switches S1-1 to S1-m are turned on, so that the image signals are fed to the capacitors C1-1 to C1-m so as to be sampled and held therein. Meanwhile, the switches S2-1 to S2-m and the MOS transistors Q2 provided in the buffers 20-1 to 20-m and 21-1 to 21-m remain off. When the image signals have been sampled and held in the capacitors C1-1 to C1-m in this way, the switches S1-1 to S1-m are turned off.
Next, when the pixels G1k to Gmk output noise signals, then the switches S2-1 to S2-m are turned on, so that the noise signals are fed to the capacitors C2-1 to C2-m so as to be sampled and held therein. Meanwhile, the switches S1-1 to S1-m and the MOS transistors Q2 provided in the buffers 20-1 to 20-m and 21-1 to 21-m remain off. When the noise signals have been sampled and held in the capacitors C2-1 to C2-m in this way, the switches S2-1 to S2-m are turned off.
Now that the image signals from the pixels G1k to Gmk are sampled and held in the capacitors C1-1 to C1-m and the noise signals from the pixels G1k to Gmk are sampled and held in the capacitors C2-1 to C2-m, the pulse signal φP is fed to the gates of the MOS transistors Q2 provided in the buffers 20-1 and 21-1 so that these MOS transistors Q2 are turned on. This causes the image and noise signals from the pixel G1k to be fed to the non-inverting and inverting input terminals, respectively, of the differential amplifier 22, which thus outputs at its output terminal a signal equal to the noise signal subtracted from the image signal. That is, the image signal is output after being corrected for the noise component included therein because of the variation in sensitivity of the pixel G1k. Next, the pulse signal φP is fed to the gates of the MOS transistors Q2 provided in the buffers 20-1 and 21-1 so that these MOS transistors Q2 are turned on. This causes the differential amplifier 22 to output the image signal that has been corrected for the noise component included therein because of the variation in sensitivity of the pixel G1k.
Similarly, the pulse signal φP is fed sequentially to the gates of the MOS transistors Q2 provided in the buffers 20-3 to 20-m and 21-3 to 21-m, so that the differential amplifier 22 sequentially outputs the image signals from the pixels G3k to Gmk after correcting them for the variations in sensitivity among those pixels. When the differential amplifier 22 completes sequential output of the image signals from the pixels G1k to Gmk with due correction, it goes on to output the image signals from the pixels G1(k+1) to Gm(k+1) in a similar manner.
However, as shown in FIG. 22, in this circuit configuration, the image and noise signals from each pixel are fed through separate buffers to the differential amplifier. Thus, variations in the characteristics of the constituent circuit components between the buffers handling image signals and the buffers handling noise signals cause variations, from one column to another, in the degree to which the image signals from the pixels are corrected. That is, whereas the MOS transistors Q1 provided in the buffers are formed as source-follower transistors, the MOS transistors Q3 provided therein so as to function as constant-current sources exhibit variations in their characteristics, which cause variations in the amplification factor of the individual buffers. As a result, the image signals output from buffers having one amplification factor are corrected with the noise signals output from buffers having a different amplification factor; that is, the image signals are corrected to uneven degrees column by column. When the image signals output from the differential amplifier are reproduced as an image, such variations in the degree of correction effected appear as vertical stripes in the reproduced image.